Molecular Device and Organic TFT
SCM (scanning capacitance microscopy)
MRAM (Magnetic random access memory)
FRAM (Ferroelectric random access memory)
Nanocrystal Memory
Template Synthesis (Fabrication nanowire using AAO)
FinFET
학력
(Ph.D.) in Electronic and Electrical Engineering, University of Texas at Austin (1992)
약력/경력
Research Assistant, UT at Austin (09/1986-12/1992)
Post Doctor, UT at Austin (01/1993-07/1993)
Samsung advanced institute of technology semiconductor device Lab (11/1993-08/2001)
Person in charge of researches, Ferroelectric device NRL (08/1999-08/2001)
Secretary, IEC Technical committee 47 (09/2002)
Head, Foundation for corporate collaboration of Sungkyunkwan University (03/2005-02/2007)
Professor, Sungkyunkwan University school of information and communication engineering
학술지 논문
(2021)
Characterization of GeO2 films formed on Ge substrate using high pressure oxidation.
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B.
39,
4
(2018)
Property Improvement of CTF Memories Utilizing Hybrid Tunnel Oxide.
IEEE TRANSACTIONS ON ELECTRON DEVICES.
65,
4
(2017)
Simulation and characterization of short-channel organic thin-film transistors fabricated using ink-jet printing and an imprint process.
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B.
35,
1
(2017)
Electrical characteristics of SiO2/ZrO2 hybrid tunnel barrier for charge trap flash memory.
JAPANESE JOURNAL OF APPLIED PHYSICS.
56,
8
(2016)
Analysis of gate-induced drain leakage characteristics and threshold voltage modulation of plasma-doped FinFETs for low-power applications.
JAPANESE JOURNAL OF APPLIED PHYSICS.
55,
(2015)
Improved film quality of plasma enhanced atomic layer deposition SiO2 using plasma treatment cycle.
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY A.
33,
1
(2014)
Highly Strained Si pFinFET on SiC With Good Control of Sub-Fin Leakage and Self-Heating.
IEEE ELECTRON DEVICE LETTERS.
35,
12
(2014)
Bulk anodization of Al by using high voltage and polydimethylsiloxane imprinting for transparent conductive films.
JOURNAL OF THE KOREAN PHYSICAL SOCIETY.
64,
11
(2014)
Study on Ag mesh/conductive oxide hybrid transparent electrode for film heaters.
NANOTECHNOLOGY.
25,
26
(2013)
Characterization of 6,13-bis(triisopropylsilylethynyl) pentacene organic thin film transistors fabricated using pattern-induced confined structure.
THIN SOLID FILMS.
550,
(2013)
Cr–Si Schottky Nano-Diodes Utilizing Anodic Aluminum Oxide Templates.
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY.
14,
1-4
(2013)
Fabrication of Room-Temperature Operational Single-Electron Devices Using Au Nanoparticles.
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY.
14,
4
(2013)
Highly conductive and transparent Ag honeycomb mesh fabricated using a monolayer of polystyrene spheres.
NANOTECHNOLOGY.
24,
23
(2012)
Synthesis and characteristics of NH2-functionalized polymer films to align and immobilize DNA molecules.
NANOSCALE RESEARCH LETTERS.
7,
(2012)
Characterization of vertical Si nanowire p-n diodes fabricated by metal-assisted etching and AAO templates.
JOURNAL OF VACUUM SCIENCE TECHNOLOGY B.
30,
4
(2012)
Characterization of tunnel-oxide degradation due to plasma field oxide recess in flash memory devices.
THIN SOLID FILMS.
520,
15
(2011)
Atomic layer etching of graphene for full graphene device fabrication.
CARBON.
50,
(2011)
The authors have fabricated Au nanodot arrays using anodic aluminum oxide AAO. Two types of
AAO, namely, hexagonal and matrix pores, were used as a template for Au deposition. Au nanodots
with a controlled size between 20 and 80 nm were obtained by changing the pore size in the AAO
template. AAO templates of 200 nm thick were fabricated using two-step anodization. Al films of
150 nm thick grown on Si 100 substrates were indented using the nanoimprint method prior to the
anodization for the matrix array of AAO. In addition, for smaller size pores, neutral beam etching
was used to remove the barrier layer. The pore size was extracted from the image analysis to the
images obtained by field emission secondary electron microscopy..
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B.
29,
3
(2011)
Removal of Anodic Aluminum Oxide Barrier Layer on Silicon
Substrate by using Cl2/BCl3 Neutral Beam Etching.
JOURNAL OF THE ELECTROCHEMICAL SOCIETY.
158,
5
(2010)
Electron shading damge enhancement due to nonuniform in-hole etch rate in deep contact-hole process.
SURFACE & COATINGS TECHNOLOGY.
205,
특허/프로그램
Matrix 구조의 pore를 갖는 다공질 알루미늄 산화막을 이용한 나노선 성장 방법.
10-2010-0054958.
20121101.
대한민국
유기 박막 트랜지스터 및 그 제조방법.
10-2009-0128465.
20111027.
대한민국
유기 박막 트랜지스터 및 그 제조방법.
1020090020220.
20110623.
미국
유기 박막 트랜지스터 및 그 제조방법.
1020090020220.
20110518.
대한민국
피넛 형상의 채널층을 갖는 전계효과 트랜지스터 및 그 제조방법.
2007-0107593.
20090506.
대한민국
수직 실린더형 트랜지스터 제조 방법및 이에 의해 제조된 수직 실린더형 트랜지스터.
2007-0081464.
20090429.
대한민국
더미 드레인층을 이용한 수직 실린더형.
20070081465.
20090312.
대한민국
유기박막 트랜지스터 및 제조방법.
10-0850495.
20080730.
대한민국
학술회의논문
(2017)
The formation of stable GeO2 oxide using high oressure oxidation.
AVS 64th International Symposium & Exhibition.
미국
(2017)
Electrical characteristics for charge trap flash memory by applying hybrid tunnel barrier composes of SiO2/ZrO2.
E-MRS.
폴란드
(2016)
Simulation and Characterization of Short Channel Organic Thin Film
Transistors Fabricated Using Ink-jet Printing and Imprint Process.
AVS symposium.
미국
(2016)
Study on Off-current hot carrier degrdation and recovery of NMOSFET in SWD circuit of DRAM.
Integrated Reliability Workshop.
미국
(2016)
Role of Dummy Via Mask in Data retention capability of NANM Flash memory.
ECS meeting.
미국
(2012)
All inkjet process로 제작한 대용량 유기 capacitor의 전기적 특성 연구.
2012 한국전기전자재료학회.
대한민국
(2012)
fabrication and Characterization of Nano-scaled Cr Schottky Diodes Using AAO Templates.
IEEE NANO 2012 12th International Conference on Nanotechnology.
영국
(2011)
금 나노입자를 이용한 상온에서의 쿨롱 차폐 현상 효과.
2012 한국전기전자재료학회.
대한민국
(2009)
Fabrication and Characterization of InkJet Processed Organic Thin Film Transistors with Poly-4-vinylphenol(PVP) Gate Dielectric.
AVS 56th International Symposium and exhibition.
미국
(2009)
Fabrication of Quantum Dots Using Multi-coated Self-assembled Monolayer.
AVS 56th international symposium and Exhibition.
미국
(2009)
Fabrication of Vertically Aligned Si Nanowires on Si(100) Substrate Utilizing Metal-assisted Etchiing.
AVS 56th International Symposium and Exhibition.
미국
(2009)
Study on Ohmic Contact Improvement of Schottky Diode Utilizing SAM and PEDOT:PSS Layers.
AVS 56th International Symposium and Exhibition.
미국
(2009)
Formation of square matrix pores on Al film utilizing FIB indent.
E-MRS 2009 spring meeting.
프랑스
(2009)
The molecular-ruler fabrication of nano structures for nano scale devices.
2009년도 전기화학회 학술발표회.
대한민국
(2008)
Fabrication of porus Si using anodic aluminum oxide.
AVS 55th international symposium & exhibition.
미국
(2008)
Characterization of p-Si/SiO2/N+ Si devices with various thickness of SiO2.
AVS 55th international symposium & Exhibition.
미국
(2008)
Effective measurements of Plasma process induced damage related to dielectric integrity degradation on gate oxide using practical structure.
AVS 55th International symposium & exhibition.
미국
(2008)
Fabrication and characteization of one dimensional semiconductiong nanowire that use AAO.
AVS 55th International Symposium & Exhibition.
미국
(2008)
Study on contact resistance degradation mechanism induced by plasma process using newly designed chain resistor for deep nano-diameter Shottky contact.
34th International Conference on Micro and Nano engineering.
그리스
(2008)
Low-k Film Damage-Resistant CO Chemistry-based Ash Process for Low-k/Cu Interconnection in Flash Memory Devices.
The 1st International Conference on Microelectrinics and Plasma Technology.
대한민국
